Compares

Applicability

Product	Supported
Atlas 350 Accelerator Card	√
Atlas A3 training product/Atlas A3 inference product	x
Atlas A2 training product/Atlas A2 inference product	x
Atlas 200I/500 A2 inference product	x
Atlas inference product AI Core	x
Atlas inference product Vector Core	x
Atlas training product	x

Function Usage

Compares each element of a tensor with a scalar. If the comparison result is true, the corresponding output bit is set to 1; otherwise, it is set to 0.

Prototype

template <typename T = DefaultType, CMPMODE mode = CMPMODE::EQ, typename U, typename S>
__simd_callee__ inline void Compares(MaskReg& dst, U& srcReg, S scalarValue, MaskReg& mask)

Parameters

**Table 1** Template parameters
Parameter	Description
T	Data type of the vector source operand. For the Atlas 350 Accelerator Card, the supported data types are int8_t, uint8_t, int16_t, uint16_t, half, bfloat16_t, int32_t, uint32_t, float, int64_t, and uint64_t.
mode	Comparison mode. The following options are supported: LT: less than GT: greater than GE: greater than or equal to EQ: equal to NE: not equal to LE: less than or equal to
U	RegTensor type of the source operand. It is automatically inferred by the compiler and does not need to be specified.
S	Data type of a scalar. For the Atlas 350 Accelerator Card, the supported data types are uint8_t, int8_t, uint16_t, int16_t, uint32_t, int32_t, half, float, bfloat16_t, uint64_t, and int64_t.

**Table 2** Parameters
Parameter	Input/Output	Description
dst	Output	Destination operand of the MaskReg type.
srcReg	Input	Source operand. The type is RegTensor.
scalarValue	Input	Source operand. The type is scalar.
mask	Input	Valid indication of the source operand element operation. For details, see MaskReg.

Returns

None

Constraints

None

Example

template<typename T>
__simd_vf__ inline void ComparesVF(__ubuf__ T* dstAddr, __ubuf__ T* src0Addr, __ubuf__ T* src1Addr, T scalarValue, uint32_t count, uint32_t oneRepeatSize, uint16_t repeatTimes)
{
    AscendC::Reg::RegTensor<T> srcReg0;
    AscendC::Reg::RegTensor<T> srcReg1;
    AscendC::Reg::RegTensor<T> dstReg;
    AscendC::Reg::MaskReg mask;
    AscendC::Reg::MaskReg cmpMaskReg;
    for (uint16_t i = 0; i < repeatTimes; i++) {
        mask = AscendC::Reg::UpdateMask<T>(count);
        AscendC::Reg::LoadAlign(srcReg0, src0Addr + i * oneRepeatSize);
        AscendC::Reg::LoadAlign(srcReg1, src1Addr + i * oneRepeatSize);       
        AscendC::Reg::Compares<T, AscendC::CMPMODE::EQ>(cmpMaskReg, srcReg0, scalarValue, mask);
        AscendC::Reg::Select(dstReg, srcReg0, srcReg1, cmpMaskReg);
        AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, dstReg, mask);
    }
}

Parent topic: Comparison and Selection