CrossCoreSetFlag (ISASI)
Supported Products
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Supported/Unsupported |
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x |
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Function Usage
Inter-core synchronization control interface oriented to the separation mode.
This API works with CrossCoreWaitFlag. The inter-core synchronization flag ID (flagId) needs to be transferred. Each ID corresponds to a counter for controlling synchronization.
The synchronization control has the following modes, as shown in Figure 1.
- Mode 0: synchronization control between AI Cores. In the AIC scenario, all AIC cores are synchronized. The subsequent instructions of CrossCoreWaitFlag are executed only when all AIC cores execute CrossCoreSetFlag. In the AIV scenario, all AIV cores are synchronized. The subsequent instructions of CrossCoreWaitFlag are executed only when all AIV cores execute CrossCoreSetFlag.
- Mode 1: synchronization control between AIV cores in the AI Core. The subsequent instructions of CrossCoreWaitFlag are executed only when both AIV cores run CrossCoreSetFlag.
- Mode 2: synchronization control between AIC and AIV cores in the AI Core. The subsequent instructions of CrossCoreWaitFlag on the two AIV cores are executed only after CrossCoreSetFlag is executed on the AIC core, and vice versa.
Prototype
1 2 | template <uint8_t modeId, pipe_t pipe> __aicore__ inline void CrossCoreSetFlag(uint16_t flagId) |
Parameters
Parameter |
Description |
|---|---|
modeId |
Inter-core synchronization mode. The options are as follows:
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pipe |
The pipeline type of the instruction. For details about the pipeline type, see Pipelines. |
Parameter |
Input/Output |
Description |
|---|---|---|
flagId |
Input |
Flag ID of the inter-core synchronization. For the For the |
Returns
None
Constraints
- When using this synchronization API, you need to set the kernel type according to the following rules:
- In the pure Vector/Cube scenario, the kernel type must be set to KERNEL_TYPE_MIX_AIV_1_0 or KERNEL_TYPE_MIX_AIC_1_0.
- In the scenario where the Vector and Cube are used together, the kernel type must be configured based on the actual situation.
- This API is used to control inter-core synchronization in the internal implementation of the Matmul high-level API. Therefore, you are not advised to use this API and the Matmul high-level API at the same time. Otherwise, flag IDs may conflict.
- A maximum of 15 times of setting can be performed for the counter of the same flag ID.
Examples
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 | // Synchronize all AIV cores in mode 0. if (g_coreType == AscendC::AIV) { AscendC::CrossCoreSetFlag<0x0, PIPE_MTE3>(0x8); AscendC::CrossCoreWaitFlag(0x8); } // Synchronize all AIV cores in the AI Core in mode 1. if (g_coreType == AscendC::AIV) { AscendC::CrossCoreSetFlag<0x1, PIPE_MTE3>(0x8); AscendC::CrossCoreWaitFlag(0x8); } // Note that if the high-level API is called, you do not need to process the synchronization between the AIC and AIV cores. // The AIC core instructs the AIV to perform subsequent processing after completing the Matmul computation. if (g_coreType == AscendC::AIC) { // Matmul computation AscendC::CrossCoreSetFlag<0x2, PIPE_FIX>(0x8); } // The AIV waits for the AIC Set message and performs subsequent processing. if (g_coreType == AscendC::AIV) { AscendC::CrossCoreWaitFlag(0x8); // Subsequent AIV processing. } |
