Overview

Built on Multi-Level Intermediate Representation (MLIR), AscendNPU Intermediate Representation (AscendNPU IR) is an intermediate representation designed for compiling Ascend-native operators. It delivers complete expressiveness for Ascend, enhances AI processor computing efficiency through compile optimizations, and enables AI processors and deep tuning via ecosystem frameworks.

AscendNPU IR provides multi-level abstract APIs. The high-level APIs simplify operator development by shielding the details of Ascend compute, data movement, and synchronization instructions, automatically detecting the hardware architecture during compile optimization and mapping hardware-independent expressions to underlying instructions. The low-level control APIs allow for granular performance tunning, including explicit on-chip memory management, pipeline synchronization insertion positions, and enablement of ping-pong pipeline optimization.

AscendNPU IR opens its APIs through the open-source community, supporting flexible integration with ecosystem frameworks to efficiently enable the AI processor.