LeakyRelu

Applicability

Product	Supported
Atlas 350 Accelerator Card	√
Atlas A3 training product/Atlas A3 inference product	x
Atlas A2 training product/Atlas A2 inference product	x
Atlas 200I/500 A2 inference product	x
Atlas inference product AI Core	x
Atlas inference product Vector Core	x
Atlas training product	x

Function Usage

Writes srcReg to dstReg directly if srcReg is greater than 0. Otherwise, writes the result of srcReg*scalarValue to dstReg. The formula is as follows:

$\text{[math]}$

Prototype

template <typename T = DefaultType, typename U, MaskMergeMode mode = MaskMergeMode::ZEROING, typename S>
__simd_callee__ inline void LeakyRelu(S& dstReg, S& srcReg, U scalarValue, MaskReg& mask)

Parameters

**Table 1** Parameters in the template
Parameter	Description
T	Data type of the destination operand and source operand. For the Atlas 350 Accelerator Card, the supported data types are half and float.
U	Data type of the scalar source operand. For the Atlas 350 Accelerator Card, the supported data types are half and float.
mode	Set it to MERGING or ZEROING. ZEROING: Elements not selected by the mask are set to zero in dstReg. MERGING: This option is not supported currently.
S	RegTensor type of the destination operand, for example, RegTensor<half>. It is automatically inferred by the compiler and does not need to be specified.

**Table 2** Parameters
Parameter	Input/Output	Description
dstReg	Output	Destination operand. The type is RegTensor.
srcReg	Input	Source operand. The type is RegTensor. The source and destination operands must have the same data type.
scalarValue	Input	Source operand. The type is scalar. The source and destination operands must have the same data type.
mask	Input	Valid indication of the source operand element operation. For details, see MaskReg.

Returns

None

Restrictions

None

Examples

template<typename T>
__simd_vf__ inline void LeakyRelu(__ubuf__ T* dstAddr, __ubuf__ T* srcAddr, T scalarValue, uint32_t count, uint32_t oneRepeatSize, uint16_t repeatTimes)
{
    AscendC::Reg::RegTensor<T> srcReg;
    AscendC::Reg::RegTensor<T> dstReg;
    AscendC::Reg::MaskReg mask;    
    for (uint16_t i = 0; i < repeatTimes; i++) {
        mask = AscendC::Reg::UpdateMask<T>(count);
        AscendC::Reg::LoadAlign(srcReg, srcAddr + i * oneRepeatSize);
        AscendC::Reg::LeakyRelu(dstReg, srcReg, scalarValue, mask);
        AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, dstReg, mask);
    }
}

Parent topic: Basic Arithmetic