Neg

Applicability

Product

Supported

Atlas 350 Accelerator Card

Atlas A3 training product/Atlas A3 inference product

x

Atlas A2 training product/Atlas A2 inference product

x

Atlas 200I/500 A2 inference product

x

Atlas inference product AI Core

x

Atlas inference product Vector Core

x

Atlas training product

x

Function Usage

Computes the opposite (negative) of the input data srcReg based on the mask, and writes the result to dstReg. The formula for computing the negative of a number is as follows:

Prototype

template <typename T = DefaultType, MaskMergeMode mode = MaskMergeMode::ZEROING, typename U>
__simd_callee__ inline void Neg(U& dstReg, U& srcReg, MaskReg& mask)

Parameters

Table 1 Parameters in the template

Parameter

Description

T

Operand data type.

For the Atlas 350 Accelerator Card, the supported data types are int8_t, int16_t, int32_t, int64_t, half, and float.

mode

Set it to MERGING or ZEROING.

  • ZEROING: The elements that are not filtered by mask are set to zero in dstReg.
  • MERGING: This option is not supported currently.

U

RegTensor type of the destination operand, for example, RegTensor<half>. It is automatically inferred by the compiler and does not need to be specified.

Table 2 Parameters

Parameter

Input/Output

Description

dstReg

Output

Destination operand.

The type is RegTensor.

srcReg

Input

Source operand.

The type is RegTensor.

The source operand must have the same data type as the destination operand.

mask

Input

Valid indication of the source operand element operation. For details, see MaskReg.

Returns

None

Restrictions

None

Examples

template<typename T>
__simd_vf__ inline void NegVF(__ubuf__ T* dstAddr, __ubuf__ T* srcAddr, uint32_t count, 
 uint32_t oneRepeatSize, uint16_t repeatTimes)
{
    AscendC::Reg::RegTensor<T> srcReg;
    AscendC::Reg::RegTensor<T> dstReg;
    AscendC::Reg::MaskReg mask;    
    for (uint16_t i = 0; i < repeatTimes; i++) {
        mask = AscendC::Reg::UpdateMask<T>(count);
        AscendC::Reg::LoadAlign(srcReg, srcAddr + i * oneRepeatSize);
        AscendC::Reg::Neg(dstReg, srcReg, mask);
        AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, dstReg, mask);
    }
}