aclrtBinaryLoadOptionValue

typedef union aclrtBinaryLoadOptionValue {
    uint32_t isLazyLoad;
    uint32_t magic;
    int32_t cpuKernelMode;
    uint32_t rsv[4];
} aclrtBinaryLoadOptionValue;

Member

Description

isLazyLoad

Whether to load the operator to the device after the operator binary is parsed and the operator is registered.

The options are as follows:

  • 1: The operator is not loaded to the device when this API is called.
  • 0: The operator is loaded to the device when this API is called. If ACL_RT_BINARY_LOAD_OPT_LAZY_LOAD is not specified, the system uses this value by default.

magic

Magic number that identifies the operator compute unit.

The options can be either of the following macros:

  • ACL_RT_BINARY_MAGIC_ELF_AICORE
  • ACL_RT_BINARY_MAGIC_ELF_VECTOR_CORE
  • ACL_RT_BINARY_MAGIC_ELF_CUBE_CORE

The macros are defined as follows:

#define ACL_RT_BINARY_MAGIC_ELF_AICORE      0x43554245U
#define ACL_RT_BINARY_MAGIC_ELF_VECTOR_CORE 0x41415246U
#define ACL_RT_BINARY_MAGIC_ELF_CUBE_CORE   0x41494343U

For details about the definition and description of the Core, see aclrtDevAttr.

cpuKernelMode

AI CPU operator registration mode.

The options are as follows:

  • 0: When the aclrtBinaryLoadFromFile API is called to load an operator, the operator information library file (.json) is used to register the operator. In this scenario, the AI CPU operator library file (.so) has been loaded to the device when the aclrtSetDevice API is called. This mode is applicable to the loading of built-in CANN operators.
  • 1: When the aclrtBinaryLoadFromFile API is called to load an operator, the operator information library file (.json) is used to register the operator. In this scenario, the aclrtBinaryLoadFromFile API searches for the AI CPU operator library file (.so) with the same name as the operator information library file. This mode is applicable to the loading of custom operators.
  • 2: When the aclrtBinaryLoadFromData API is called to load an operator, the aclrtRegisterCpuFunc API is called as well to register AI CPU operator information. This mode is applicable to the scenario where neither the operator information library file nor the operator library file is available.

rsv

Reserved.