slvs_err_check_mode_t
Description
The cyclic redundancy check (CRC) and error control coding (ECC) modes of the SLVS.
Prototype
typedef enum {
SLVS_ERR_CHECK_MODE_NONE = 0x0, /* disable ECC & CRC */
SLVS_ERR_CHECK_MODE_CRC = 0x1, /* enable CRC */
SLVS_ERR_CHECK_MODE_ECC_2BYTE = 0x2, /* enable 2 Byte ECC */
SLVS_ERR_CHECK_MODE_ECC_4BYTE = 0x3, /* enable 4 Byte ECC */
SLVS_ERR_CHECK_MODE_BUTT
} slvs_err_check_mode_t;
Members
Member |
Description |
|---|---|
SLVS_ERR_CHECK_MODE_NONE |
Disables ECC and CRC. |
SLVS_ERR_CHECK_MODE_CRC |
Enables CRC. |
SLVS_ERR_CHECK_MODE_ECC_2BYTE |
Enables 2-byte ECC. |
SLVS_ERR_CHECK_MODE_ECC_4BYTE |
Enables 4-byte ECC. |
Considerations
The ECC and CRC functions of the SLVS are mutually exclusive and cannot be enabled at the same time.
Parent topic: MIPI RX ioctl Command Words