Terminology

**Table 1** Terminology
Term	Description
Ascend IR	Short for Ascend Intermediate Representation. It is an abstract data structure dedicated to Ascend AI processors and is used to represent the computation process. Unless otherwise specified, IR refers to Ascend IR by default.
Block	A block has multiple meanings in different scenarios. Generally, it refers to the logical core of the AI Core. Typical scenarios are as follows: Logical core of the AI Core: A block indicates a logical core of the AI Core. The ID of this block is a logical number starting from 0. DataBlock: A data block refers to a data unit that can be processed by an NPU vector computing instruction. Its size is usually 32 bytes. One instruction can be used to process multiple data blocks concurrently. Basic block: It indicates the size of a typical data block required for one computation.
Broadcast	Broadcast is a tensor operation mechanism. Through broadcast, a smaller tensor can be automatically expanded to match the shape of a larger tensor.
Device	A device refers to the hardware device equipped with an Ascend AI processor. It connects to the host over the PCIe interface and provides the neural network (NN) compute capability for the host. Memory sharing among devices is not supported.
Host	A host refers to the x86 or Arm server connected to the device. The host utilizes the NN compute capabilities provided by the device to implement services.
Global Memory/GM	Main memory of the device, which is the external storage of the AI Core. It is used to store large-scale data. However, the access approach needs to be optimized to improve performance.
Kernel	Kernel function. It is a parallel function executed on the device.
MTE	Short for Memory Transfer Engine. It works as the data transfer engine of the AI Core.
OP	An operator (OP) is the fundamental unit for executing specific mathematical computations or operations in deep learning algorithms. Common examples include activation functions (such as ReLU), convolution (Conv), pooling, and normalization (such as Softmax). These operators can be combined to build a neural network model.
Tiling	Tiling refers to data partitioning and blocking. For large-scale data computation, multi-core tiling is required, and each core needs to be partitioned into multiple blocks for multiple computations.
TilingData	TilingData refers to the parameters related to data partitioning and blocking (such as the size of the block to be moved each time and the number of iterations). Due to the limited scalar computing capability of the device, tiling parameters are generally computed on the host and then transferred to the device for the kernel functions to use.
TilingFunc	Default function provided by an operator project for tiling computation on the host.
Unified Buffer/UB	Internal storage unit of the AI Core, which is mainly used for vector computation and corresponds to the logical memory AscendC::TPosition::VECIN, AscendC::TPosition::VECOUT, and AscendC::TPosition::VECCALC.

Parent topic: Appendix