reg computation data movement interface, applicable for scenarios where data is continuously loaded from a start address in UB that is not 32-byte aligned into a vector data register.
This interface does not change the address of the source operand in UB. For each loop iteration, the user needs to manually update the address of the source operand in UB.
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For details about vector data registers and unaligned registers, see .
None
PIPE_V
- The src1 in this interface does not need to be 32-byte aligned.
- Before calling this interface, you need to call to perform initialization before unaligned load.
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