Select

Applicability

Product	Supported
Atlas 350 Accelerator Card	√
Atlas A3 training product/Atlas A3 inference product	x
Atlas A2 training product/Atlas A2 inference product	x
Atlas 200I/500 A2 inference product	x
Atlas inference product AI Core	x
Atlas inference product Vector Core	x
Atlas training product	x

Function Usage

Selects elements from the two given source operands srcReg0 and srcReg1 based on the bit values of mask to obtain the destination operand dstReg. The selection rule is as follows: When the bit of mask is 1, the number in the corresponding position of srcReg0 is selected. When the bit of mask is 0, the number in the corresponding position of srcReg1 is selected.

Prototype

template <typename T = DefaultType, typename U>
__simd_callee__ inline void Select(U& dstReg, U& srcReg0, U& srcReg1, MaskReg& mask)

Parameters

**Table 1** Template parameters
Parameter	Description
T	Operand data type. For the Atlas 350 Accelerator Card, the supported data types are bool, uint8_t, int8_t, uint16_t, int16_t, uint32_t, int32_t, half, float, bfloat16_t, uint64_t and int64_t.
U	RegTensor type of the source and destination operands, for example, RegTensor<half>. It is automatically inferred by the compiler and does not need to be specified.

**Table 2** Parameters
Parameter	Input/Output	Description
dstReg	Output	Destination operand. The type is RegTensor.
srcReg0, srcReg1	Input	Source operand. The type is RegTensor. Both source operands must have the same data type as the destination operand.
mask	Input	srcReg0 or srcReg1 is selected as the valid data. When the bit of mask is 1, srcReg0 is selected. When the bit of mask is 0, srcReg1 is selected.

Returns

None

Constraints

None

Example

template<typename T>
__simd_vf__ inline void SelectVF(__ubuf__ T* dstAddr, __ubuf__ T* src0Addr, __ubuf__ T* src1Addr, uint32_t count, uint32_t oneRepeatSize, uint16_t repeatTimes)
{
    AscendC::Reg::RegTensor<T> srcReg0;
    AscendC::Reg::RegTensor<T> srcReg1;
    AscendC::Reg::RegTensor<T> dstReg;
    AscendC::Reg::MaskReg mask;
    AscendC::Reg::MaskReg cmpReg;
    for (uint16_t i = 0; i < repeatTimes; i++) {
        mask = AscendC::Reg::UpdateMask<T>(count);        
        AscendC::Reg::LoadAlign(srcReg0, src0Addr + i * oneRepeatSize);
        AscendC::Reg::LoadAlign(srcReg1, src1Addr + i * oneRepeatSize);      
        AscendC::Reg::Compare<T, AscendC::CMPMODE::EQ>(cmpReg, srcReg0, srcReg1, mask);
        AscendC::Reg::Select(dstReg, srcReg0, srcReg1, cmpReg);
        AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, dstReg, mask);
    }
}

Parent topic: Comparison and Selection