SubC
Applicability
Product |
Supported |
|---|---|
Atlas 350 Accelerator Card |
√ |
x |
|
x |
|
x |
|
x |
|
x |
|
x |
Function Usage
Performs subtraction between the source operands srcReg0 and srcReg1 and the carry data carrySrc element-wise based on mask and writes the result to the destination operand dstReg. If the borrowing result is generated when subtraction is performed between srcReg0, srcReg1, and carrySrc, the least significant bit of every four bits in the corresponding position of MaskReg carry is written as 0. Otherwise, it is written as 1. The formula is as follows:

Examples:
Data Type |
Borrowing |
Examples |
|---|---|---|
int32_t |
No |
a_i = 5, b_i = 2, carrySrc_i = 1 dst_i = a_i - b_i - carrySrc_i = 2 Write 1 to the least significant bit of every four bits in the corresponding position in carryp: carry_i = 1 |
Yes |
a_i = 5, b_i = -7, carrySrc_i = 1 dst_i = a_i - b_i - carrySrc_i = 11 Write 0 to the least significant bit of every four bits in the corresponding position in carryp: carry_i = 0 |
|
uint32_t |
No |
a_i = 5, b_i = 2, carrySrc_i = 1 dst_i = a_i - b_i - carrySrc_i = 2 Write 1 to the least significant bit of every four bits in the corresponding position in carryp: carry_i = 1 |
Yes |
a_i = 5, b_i = 7, carrySrc_i = 1 dst_i = a_i - b_i - carrySrc_i = -3 Write 0 to the least significant bit of every four bits in the corresponding position in carryp: carry_i = 0 |
Prototype
template <typename T = DefaultType, typename U> __simd_callee__ inline void SubC(MaskReg& carry, U& dstReg, U& srcReg0, U& srcReg1, MaskReg& carrySrc, MaskReg& mask)
Parameters
Parameter |
Description |
|---|---|
T |
Data type of the vector destination operand and source operand. For the Atlas 350 Accelerator Card, the supported data types are uint32_t and int32_t. |
U |
RegTensor type of the destination operand, for example, RegTensor<half>. It is automatically inferred by the compiler and does not need to be specified. |
Parameter |
Input/Output |
Description |
|---|---|---|
dstReg |
Output |
Destination operand. The type is RegTensor. |
srcReg0 |
Input |
Source operand. The type is RegTensor. The source and destination operands must have the same data type. |
srcReg1 |
Input |
Source operand. The type is RegTensor. The source and destination operands must have the same data type. |
carrySrc |
Input |
Source operand. Input carry value. The type is MaskReg. |
carry |
Output |
Destination operand. Output carry value. The type is MaskReg. |
mask |
Input |
Valid indication of the source operand element operation. For details, see MaskReg. |
Returns
None
Restrictions
None
Examples
template <typename T>
__simd_vf__ inline void SubC(__ubuf__ T* dst0Addr, __ubuf__ T* dst1Addr, __ubuf__ T* src0Addr, __ubuf__ T* src1Addr, uint32_t count, uint16_t repeatTimes, uint32_t oneRepeatSize){
AscendC::Reg::RegTensor<T> srcReg0;
AscendC::Reg::RegTensor<T> srcReg1;
AscendC::Reg::RegTensor<T> dstReg0;
AscendC::Reg::MaskReg mask;
AscendC::Reg::MaskReg maskZero = AscendC::Reg::CreateMask<T, AscendC::Reg::MaskPattern::ALLF>();
AscendC::Reg::MaskReg carry = AscendC::Reg::CreateMask<uint8_t>();
for (uint16_t i = 0; i < repeatTimes; i++) {
mask = AscendC::Reg::UpdateMask<T>(count);
AscendC::Reg::LoadAlign(srcReg0, src0Addr + i * oneRepeatSize);
AscendC::Reg::LoadAlign(srcReg1, src1Addr + i * oneRepeatSize);
AscendC::Reg::SubC(carry, dstReg0, srcReg0, srcReg1, maskZero, mask);
// 8*4B=32B align
AscendC::Reg::StoreAlign<uint32_t, AscendC::Reg::MaskDist::DIST_NORM>((__ubuf__ uint32_t*)dst1Addr + i * 8, carry);
AscendC::Reg::StoreAlign(dst0Addr + i * oneRepeatSize, dstReg0, mask);
}
}