XOR

Applicability

Function Usage

Corresponds to two APIs, used for operations on RegTensor and MaskReg, respectively:

• Operations on RegTensor:

  Perform element-wise XOR (^) operation on input data srcReg0 and srcReg1 based on the mask, and write the result to dstReg. The formula is as follows:

  

• Operations on MaskReg:

  Compute the logical XOR of the valid bits from two input MaskRegs to produce a new MaskReg.

Prototype

• Operations on RegTensor:

  template <typename T = DefaultType, MaskMergeMode mode = MaskMergeMode::ZEROING, typename U>
  __simd_callee__ inline void Xor(U& dstReg, U& srcReg0, U& srcReg1, MaskReg& mask)

• Operations on MaskReg:

  __simd_callee__ inline void Xor(MaskReg& dst, MaskReg& src0, MaskReg& src1, MaskReg& mask)

Parameters

• Operations on RegTensor:

  Table 1 Template parameters

  Parameter	Description
  T	Operand data type. For the Atlas 350 Accelerator Card, the supported data types are bool, uint8_t, int8_t, uint16_t, int16_t, uint32_t, int32_t, uint64_t, and int64_t.
  mode	Set it to MERGING or ZEROING. ZEROING: The elements that are not filtered by mask are set to zero in dst. MERGING: This option is not supported currently.
  U	RegTensor type of srcReg0, srcReg1, or dstReg, for example, RegTensor<uint32_t>. It is automatically inferred by the compiler and does not need to be specified.

  Table 2 Parameters

  Parameter	Input/Output	Description
  dstReg	Output	Destination operand. The type is RegTensor.
  srcReg0	Input	Source operand. The type is RegTensor. The source and destination operands must have the same data type.
  srcReg1	Input	Source operand. The type is RegTensor. The source and destination operands must have the same data type.
  mask	Input	Valid indication of the source operand element operation. For details, see MaskReg.

• Operations on MaskReg:

  Table 3 Parameters

  Parameter	Description
  dst	Destination operand.
  src0	Source operand.
  src1	Source operand.
  mask	This parameter indicates which bits are valid during the computation process.

Returns

None

Restrictions

None

Examples

• Operations on RegTensor:

  template <typename T>
  __simd_vf__ inline void XorVF(__ubuf__ T* dstAddr, __ubuf__ T* src0Addr, __ubuf__ T* src1Addr, uint32_t count, uint32_t oneRepeatSize, uint16_t repeatTimes)
  {
      AscendC::Reg::RegTensor<T> srcReg0;
      AscendC::Reg::RegTensor<T> srcReg1;
      AscendC::Reg::RegTensor<T> dstReg;
      AscendC::Reg::MaskReg mask;
      for (uint16_t i = 0; i < repeatTimes; i++) {
          mask = AscendC::Reg::UpdateMask<T>(count);
          AscendC::Reg::LoadAlign(srcReg0, src0Addr + i * oneRepeatSize);
          AscendC::Reg::LoadAlign(srcReg1, src1Addr + i * oneRepeatSize);       
          AscendC::Reg::Xor(dstReg, srcReg0, srcReg1, mask);
          AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, dstReg, mask);
      }
  }

• Operations on MaskReg:

  template <typename T>
  __simd_vf__ inline void XorVF(__ubuf__ T* dstAddr, __ubuf__ T* srcAddr, uint32_t count, uint32_t oneRepeatSize, uint16_t repeatTimes)
  {
      AscendC::Reg::RegTensor<T> srcReg;
      AscendC::Reg::MaskReg src0 = AscendC::Reg::CreateMask<T, AscendC::Reg::MaskPattern::ALLF>();
      AscendC::Reg::MaskReg src1 = AscendC::Reg::CreateMask<T, AscendC::Reg::MaskPattern::ALL>();
      AscendC::Reg::MaskReg dst;
      AscendC::Reg::MaskReg mask;
      for (uint16_t i = 0; i < (uint16_t)repeatTimes; ++i) {
          mask = AscendC::Reg::UpdateMask<T>(count);
          AscendC::Reg::LoadAlign(srcReg, srcAddr + i * oneRepeatSize);
          AscendC::Reg::Xor(dst, src0, src1, mask);
          AscendC::Reg::Adds(srcReg, srcReg, 0, dst);
          AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, srcReg, mask);
      }
  }