Move

Applicability

Product

Supported

Atlas 350 Accelerator Card

Atlas A3 training product/Atlas A3 inference product

x

Atlas A2 training product/Atlas A2 inference product

x

Atlas 200I/500 A2 inference product

x

Atlas inference product AI Core

x

Atlas inference product Vector Core

x

Atlas training product

x

Function Usage

Copies valid elements in srcReg one by one and writes them to the corresponding positions in dstReg.

Prototype

  • The mask parameter can be passed.
    template <typename T = DefaultType, MaskMergeMode mode = MaskMergeMode::MERGING, typename U>
    __simd_callee__ inline void Move(U& dstReg, U& srcReg, MaskReg mask);
  • The mask parameter cannot be passed.
    template <typename T = DefaultType, typename U>
    __simd_callee__ inline void Move(U& dstReg, U& srcReg);

Parameters

Table 1 Parameters in the template

Parameter

Description

T

Data type of the source operand and destination operand.

For the Atlas 350 Accelerator Card, the supported data types are bool, uint8_t, int8_t, uint16_t, int16_t, uint32_t, int32_t, half, float, bfloat16_t, int64_t, and uint64_t.

mode

Only the MERGING mode is supported.

  • MERGING: The elements that are not filtered by mask remain unchanged in dst. Currently, only this mode is supported.

U

RegTensor type of the destination operand, for example, RegTensor<half>. It is automatically inferred by the compiler and does not need to be specified.

Table 2 Parameters

Parameter

Input/Output

Description

dstReg

Output

Destination operand.

The type is RegTensor.

srcReg

Input

Source operand.

The type is RegTensor.

The source operand must have the same data type as the destination operand.

mask

Input

Valid indication of the source operand element operation. For details, see MaskReg.

Returns

None

Restrictions

None

Examples

template<typename T>
__simd_vf__ inline void MoveVF(__ubuf__ T* dstAddr, __ubuf__ T* srcAddr, uint32_t count, 
 uint32_t oneRepeatSize, uint16_t repeatTimes)
{
    AscendC::Reg::RegTensor<T> srcReg;
    AscendC::Reg::RegTensor<T> dstReg;
    AscendC::Reg::MaskReg mask;
    mask = AscendC::Reg::UpdateMask<T>(count);
    for (uint16_t i = 0; i < repeatTimes; i++) {
        AscendC::Reg::LoadAlign(srcReg, srcAddr + i * oneRepeatSize);
        AscendC::Reg::Move(dstReg, srcReg, mask);
        AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, dstReg, mask);
    }
}