Ln

Applicability

Product

Supported

Atlas 350 Accelerator Card

Atlas A3 training product/Atlas A3 inference product

x

Atlas A2 training product/Atlas A2 inference product

x

Atlas 200I/500 A2 inference product

x

Atlas inference product AI Core

x

Atlas inference product Vector Core

x

Atlas training product

x

Function Usage

Computes the natural logarithm of the input data src based on mask and writes the result to dst. The formula is as follows:

Prototype

template <typename T = DefaultType, auto mode = MaskMergeMode::ZEROING, typename U>
__simd_callee__ inline void Ln(U& dstReg, U& srcReg, MaskReg& mask)

Parameters

Table 1 Parameters in the template

Parameter

Description

T

Operand data type.

For the Atlas 350 Accelerator Card, the supported data types are half and float.

mode

It can be set to the enumeration of MaskMergeMode or a pointer to a structure of LnSpecificMode.
  • MaskMergeMode: Set it to MERGING or ZEROING.
    • ZEROING: The elements that are not filtered by mask are set to zero in dstReg.
    • MERGING: This option is not supported currently.
  • LnSpecificMode is defined as follows:
    enum class LnAlgo {
        INTRINSIC = 0,
        PRECISION_1ULP_FTZ_TRUE,
        PRECISION_1ULP_FTZ_FALSE,
    };
    struct LnSpecificMode{
        MaskMergeMode mrgMode = MaskMergeMode::ZEROING,
        LnAlgo algo = LnAlgo::INTRINSIC;
    };
    • mrgMode: Set it to MERGING or ZEROING.
    • algo: used to configure the subnormal mode.
      • LnAlgo::INTRINSIC and LnAlgo::PRECISION_1ULP_FTZ_TRUE: The result is computed using a single instruction, and all subnormal numbers are approximated to 0.
      • LnAlgo::PRECISION_1ULP_FTZ_FALSE: Subnormal data computation is supported.

U

RegTensor type of the source and destination operands, for example, RegTensor<half>. It is automatically inferred by the compiler and does not need to be specified.

Table 2 Parameters

Parameter

Input/Output

Description

dstReg

Output

Destination operand.

The type is RegTensor.

srcReg

Input

Source operand.

The type is RegTensor.

The source operand must have the same data type as the destination operand.

mask

Input

Valid indication of the source operand element operation. For details, see MaskReg.

Returns

None

Restrictions

  • When the input src is -0, the output is -inf.

Examples

template<typename T>
__simd_vf__ inline void LnVF(__ubuf__ T* dstAddr, __ubuf__ T* srcAddr, uint32_t count, 
 uint32_t oneRepeatSize, uint16_t repeatTimes)
{
    AscendC::Reg::RegTensor<T> srcReg;
    AscendC::Reg::RegTensor<T> dstReg;
    AscendC::Reg::MaskReg mask;
    // Subnormal mode
    // static constexpr AscendC::Reg::LnSpecificMode mode = {MaskMergeMode::ZEROING, LnAlgo::PRECISION_1ULP_FTZ_FALSE};
    for (uint16_t i = 0; i < repeatTimes; i++) {     
        mask = AscendC::Reg::UpdateMask<T>(count);
        AscendC::Reg::LoadAlign(srcReg, srcAddr + i * oneRepeatSize);
        AscendC::Reg::Ln(dstReg, srcReg, mask);
        // Subnormal mode
        // AscendC::Reg::Ln<T, &mode>(dstReg, srcReg, mask);
        AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, dstReg, mask);
    }
}