Sqrt
Applicability
Product |
Supported |
|---|---|
Atlas 350 Accelerator Card |
√ |
x |
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x |
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x |
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x |
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Function Usage
Applies the square root (Sqrt) operation to the input data srcReg based on the mask, and writes the result to dstReg. The formula is as follows:

Prototype
template <typename T = DefaultType, auto mode = MaskMergeMode::ZEROING, typename U> __simd_callee__ inline void Sqrt(U& dstReg, U& srcReg, MaskReg& mask)
Parameters
Parameter |
Description |
|---|---|
T |
Operand data type. For the Atlas 350 Accelerator Card, the supported data types are half and float. |
mode |
It can be set to the enumeration of MaskMergeMode or a pointer to a structure of SqrtSpecificMode.
|
U |
RegTensor type of the source and destination operands, for example, RegTensor<half>. It is automatically inferred by the compiler and does not need to be specified. |
Parameter |
Input/Output |
Description |
|---|---|---|
dstReg |
Output |
Destination operand. The type is RegTensor. |
srcReg |
Input |
Source operand. The type is RegTensor. The source operand must have the same data type as the destination operand. |
mask |
Input |
Valid indication of the source operand element operation. For details, see MaskReg. |
Returns
None
Restrictions
If the value of srcReg is not positive, unpredictable results may occur.
Examples
template<typename T>
__simd_vf__ inline void SqrtVF(__ubuf__ T* dstAddr, __ubuf__ T* srcAddr, uint32_t count,
uint32_t oneRepeatSize, uint16_t repeatTimes)
{
AscendC::Reg::RegTensor<T> srcReg;
AscendC::Reg::RegTensor<T> dstReg;
AscendC::Reg::MaskReg mask;
// High-precision mode
// static constexpr AscendC::Reg::SqrtSpecificMode mode = {MaskMergeMode::ZEROING, true};
// Subnormal mode
// static constexpr AscendC::Reg::SqrtSpecificMode mode = {MaskMergeMode::ZEROING, true, SqrtAlgo::PRECISION_0ULP_FTZ_FALSE};
for (uint16_t i = 0; i < repeatTimes; i++) {
mask = AscendC::Reg::UpdateMask<T>(count);
AscendC::Reg::LoadAlign(srcReg, srcAddr + i * oneRepeatSize);
AscendC::Reg::Sqrt(dstReg, srcReg, mask);
// High-precision or subnormal mode
// AscendC::Reg::Sqrt<T, &mode>(dstReg, srcReg, mask);
AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, dstReg, mask);
}
}