ShiftRight (Shift Amount as Tensor)

Applicability

Product	Supported
Atlas 350 Accelerator Card	√
Atlas A3 training product/Atlas A3 inference product	x
Atlas A2 training product/Atlas A2 inference product	x
Atlas 200I/500 A2 inference product	x
Atlas inference product AI Core	x
Atlas inference product Vector Core	x
Atlas training product	x

Function Usage

Performs a right shift on each element of the source operand.

If the data type is unsigned, a logical right shift is performed. If the data type is signed, an arithmetic right shift is performed.

A logical right shift discards the least significant bits and fills the most significant bits with 0.

An arithmetic right shift discards the least significant bits and replicates the sign bit into the most significant bits.

For example, the binary number 1010101010101010 (uint16_t) becomes 0101010101010101 after a logical right shift by 1 bit.

For example, the binary number 1010101010101010 (int16_t) becomes 1101010101010101 after an arithmetic right shift by 1 bit.

The binary number 1010101010101010 (int16_t) becomes 1111010101010101 after an arithmetic right shift by 3 bits.

Prototype

template <typename T, typename U>
__aicore__ inline void ShiftRight(const LocalTensor<T>& dst, const LocalTensor<T>& src0, const LocalTensor<U>& src1, const int32_t& count)

Parameters

**Table 1** Template parameters
Parameter	Description
T	Data type of the source and destination operands. For the Atlas 350 Accelerator Card, the supported data types are int8_t, uint8_t, int16_t, uint16_t, int32_t, uint32_t, int64_t, and uint64_t.
U	Data type of the source operand. For the Atlas 350 Accelerator Card, the supported data types are int8_t, int16_t, int32_t, and int64_t.

**Table 2** Parameters
Parameter	Input/Output	Meaning
dst	Output	Destination operand. The type is LocalTensor, and TPosition can be VECIN, VECCALC, or VECOUT. The start address of LocalTensor must be 32-byte aligned.
src0	Input	Source operand. The type is LocalTensor, and TPosition can be VECIN, VECCALC, or VECOUT. The start address of LocalTensor must be 32-byte aligned. The data type must be the same as that of the destination operand.
src1	Input	LocalTensor that stores the number of bits to shift (shift amount). It must have a data type with the same byte size as the tensor element data type of the src0 operand. Negative values are not supported.
count	Input	Number of elements involved in the computation.

Returns

None

Restrictions

For details about the operand address alignment requirements, see General Address Alignment Restrictions.

For a logical shift (unsigned data type), if the shift amount is greater than the bit width of the data type, the output is 0.
For an arithmetic shift (signed data type), if src0 is less than 0, src1 is greater than 0, and the shift amount is greater than the bit width of the data type, the output is –1. If src0 is greater than 0 and the shift amount is greater than the bit width of the data type, the output is 0.

Examples

AscendC::ShiftRight(dstLocal, srcLocal0, srcLocal1, 512);

Result example:

Input (srcLocal0): [1 2 3 ... 512]
Input (srcLocal1): [2 2 2 ... 2]
Output (dstLocal): [0 0 0 1 1 1 1 ... 128]

Parent topic: Logical Computation