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Moves the Mx scale matrix from L1 Buffer to L0A Buffer.

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None

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PIPE_MTE1

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• The fractal of the scale matrix is fixed to (16, 2, 16), corresponding to the fractal (16, 32, 16) in L0A Buffer, occupying 1/16 of the L0A Buffer address. The address must be stored according to this address constraint.
• The data type of dst (L0A Buffer address) supports fp4x2_e2m1_t, fp4x2_e1m2_t, fp8_e5m2_t, and fp8_e4m3fn_t. The data type of src supports fp8_e8m0_t.
• The start addresses of dst and src must be 32-byte aligned.

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