RegTensor

Function Usage

Indicates the basic unit for Reg vector computation. The bit width of RegTensor is the vector length (VL). The specific value may vary depending on the AI processor model.

Prototype

template <typename T, const RegTrait& regTrait = RegTraitNumOne> struct RegTensor;

Functions

Template parameter T. The supported data types (widths) are b8, b16, b32, and b64.

Data Type Width	Data Type
b8	The supported data types are bool, int8_t, uint8_t, fp4x2_e2m1_t, fp4x2_e1m2_t, hifloat8_t, fp8_e5m2_t, fp8_e4m3fn_t, and fp8_e8m0_t. [On the Vector side, the two b4 types (fp4x2_e2m1_t and fp4x2_e1m2_t) must be arranged in pairs in memory, represented as the b8 type. The int4b_t type is also represented as b8. The bool data type supports only data movement operations.]
b16	The supported data types are int16_t, uint16_t, half, and bfloat16_t.
b32	The supported data type is int32_t, uint32_t, complex32, or float.
b64	The supported data type is int64_t, complex64, or uint64_t.

The template parameter regTrait indicates the number of vector Regs contained in the RegTensor type. When regTrait is RegTraitNumOne, the RegTensor type contains one vector register of the corresponding data type with a length of VL. When regTrait is RegTraitNumTwo, the RegTensor type contains two vector registers of the corresponding data type, with a total length of 2 × VL. The length of each vector register is VL.

Template Parameter regTrait	Supported Data Type Width
RegTraitNumOne	For the Atlas 350 Accelerator Card, the supported data type width is b8, b16, b32, or b64.
RegTraitNumTwo	For the Atlas 350 Accelerator Card, the supported data type width is b64 or complex32.

Availability

For the Atlas 350 Accelerator Card, VL = 256 bytes

Restrictions

None

Examples

Example 1

AscendC::Reg::RegTensor<uint32_t> reg;
AscendC::Reg::MaskReg mask = AscendC::Reg::CreateMask<uint32_t>();
AscendC::Reg::LoadAlign(reg, src, 0);
AscendC::Reg::Adds(reg, reg, 1);
AscendC::Reg::StoreAlign(dst, reg, 0, mask);

Example 2

// For B64, RegTraitNumTwo can be passed.
template<typename T, const AscendC::Reg::RegTrait& Trait = AscendC::Reg::RegTraitNumOne>
__simd_vf__ inline void AddVF(__ubuf__ T* dstAddr, __ubuf__ T* src0Addr, __ubuf__ T* src1Addr, uint32_t count, uint32_t oneRepeatSize, uint16_t repeatTimes)
{
    AscendC::Reg::RegTensor<T,Trait> srcReg0;
    AscendC::Reg::RegTensor<T,Trait> srcReg1;
    AscendC::Reg::RegTensor<T,Trait> dstReg;
    AscendC::Reg::MaskReg mask;
    for (uint16_t i = 0; i < repeatTimes; i++) {
        mask = AscendC::Reg::UpdateMask<T,Trait>(count);
        AscendC::Reg::LoadAlign(srcReg0, src0Addr + i * oneRepeatSize);
        AscendC::Reg::LoadAlign(srcReg1, src1Addr + i * oneRepeatSize);
        AscendC::Reg::Add(dstReg, srcReg0, srcReg1, mask);
        AscendC::Reg::StoreAlign(dstAddr + i * oneRepeatSize, dstReg, mask);
    }
}

Parent topic: Register Data Types